Senior Physical Design Engineer Jobs
Senior Physical Design Engineer jobs are open across semiconductor, consumer electronics, and automotive industries, from mid-level to staff and principal engineer, with specializations in floorplanning, clock tree synthesis, and timing closure. Find a role that fits from the openings below and apply directly.
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Showing 5 of 33+ Senior Physical Design Engineer jobs
INTRODUCTION
We are now looking for a Senior Physical Design Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice to join our diverse team today.
ROLE AND RESPONSIBILITIES
Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets.
As a member of a team, we will all participate in establishing physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing closure.
* Craft designs for static timing analysis, power and noise analysis and back-end verification.
BASIC QUALIFICATIONS
BSEE (MSEE preferred) or equivalent experience.
8+ years of experience in large VLSI physical design implementation on 5nm, 4nm and 3nm technology.
Your successful track record of delivering designs to production is a requirement.
Shown experience in the following areas: Power, Performance and Area improvement Initiatives is a plus.
Already a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys (ICC2/DC/PT/STAR-RC/ICV), Cadence (Innovus, Tempus, SeaHawk) and Mentor Graphics.
Deep understanding of custom macro blocks such as RAMs, CAMs, high-speed IO drivers, PLLs.
Confirmed prior experience in timing closure, clock/power distribution and analysis, RC extraction and correlation, place/route and tapeout solutions.
To be successful you should possess strong analytical and debugging skills required.
* Proficiency using Python, Perl, Tcl, Make scripting is helpful.
COMPENSATION
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until May 18, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
JR2010157
INTRODUCTION
We are now looking for a Senior Physical Design Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice to join our diverse team today.
ROLE AND RESPONSIBILITIES
Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets.
As a member of a team, we will all participate in establishing physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing closure.
* Craft designs for static timing analysis, power and noise analysis and back-end verification.
BASIC QUALIFICATIONS
BSEE (MSEE preferred) or equivalent experience.
8+ years of experience in large VLSI physical design implementation on 5nm, 4nm and 3nm technology.
Your successful track record of delivering designs to production is a requirement.
Shown experience in the following areas: Power, Performance and Area improvement Initiatives is a plus.
Already a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys (ICC2/DC/PT/STAR-RC/ICV), Cadence (Innovus, Tempus, SeaHawk) and Mentor Graphics.
Deep understanding of custom macro blocks such as RAMs, CAMs, high-speed IO drivers, PLLs.
Confirmed prior experience in timing closure, clock/power distribution and analysis, RC extraction and correlation, place/route and tapeout solutions.
To be successful you should possess strong analytical and debugging skills required.
* Proficiency using Python, Perl, Tcl, Make scripting is helpful.
COMPENSATION
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until May 18, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
JR2010157
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Find JobsSenior Physical Design Engineer Job Market
A snapshot from current openings nationwide, updated as new roles post.
Who's Hiring
- NVIDIA8
- Intel6
- Astera Labs3
- Credo Semiconductor2
- Intel Ndtm US2
Top Industries Hiring
- Electronics & Hardware17
- Technology & Software12
- Consulting & Professional Services5
- Law & Legal Services3
- Media & Entertainment1
What Employers Look For
The qualifications that appear most often in senior physical design engineer jobs.
- 5+ years of experience in physical design at advanced process nodes
- Proficiency in Cadence Innovus or Synopsys IC Compiler for full-flow implementation
- Hands-on experience with floorplanning, placement, routing, and timing closure
- Strong understanding of static timing analysis using PrimeTime or similar tools
- Bachelor's or master's degree in electrical engineering, computer engineering, or a related field
- Experience with DRC and LVS signoff using Mentor Calibre or equivalent verification tools
Tips for Your Senior Physical Design Engineer Job Search
Quantify your physical design tape-outs
Hiring managers want to see how many tape-outs you've contributed to and at what process nodes. List the technology node, die size, and your specific ownership area, like top-level integration or partition-level timing closure, for each project on your resume.
Target openings by process node generation
Companies working at advanced nodes like 3nm or 5nm filter for very different skill sets than those at 16nm or 28nm. Read job descriptions carefully for the node family and prioritize roles where your hands-on experience is a direct match.
Apply early to roles that fit
Migrate Mate lists senior physical design engineer openings from across the United States in one place, so you can find roles that match and apply directly to each listing.
Tailor your resume to EDA tool stacks
Cadence Innovus, Synopsys IC Compiler, and Mentor Calibre all appear in job descriptions by name. Mirror the exact tool names used in each posting rather than writing generic phrases like 'industry-standard EDA tools' to pass automated screening.
Prepare a timing closure narrative for interviews
Most technical screens for this role include a deep-dive on how you've resolved setup or hold violations under tight PPA constraints. Walk in ready to describe a specific closure challenge, the root cause, and the physical implementation change that resolved it.
Negotiate using scope, not just title
At the senior level, compensation packages differ significantly based on block ownership and tape-out frequency. Before accepting an offer, clarify how many active tapes you'd own per year and whether the role includes sign-off authority, both of which affect your leverage.
Senior Physical Design Engineer Jobs: Frequently Asked Questions
Which companies are hiring the most senior physical design engineers?
The companies hiring the most senior physical design engineers right now include NVIDIA, Intel, and Astera Labs, with the largest share of openings in California, Texas, and Arizona, based on current listings on Migrate Mate as of June 2026. Demand is concentrated at chip design companies and semiconductor IP providers actively preparing new tape-outs.
How many senior physical design engineer jobs are remote?
About 39% of senior physical design engineer openings are fully remote or hybrid as of June 2026, reflecting the hands-on EDA tool access most roles require. Sub-specializations in front-end physical verification review and timing analysis consulting tend to have a higher share of remote-eligible positions than full-flow implementation roles.
How do you become a senior physical design engineer?
Start with a degree in electrical or computer engineering and gain foundational experience in digital backend flows, including synthesis, placement, and routing. Build expertise at a specific process node family, earn proficiency in at least one major EDA tool suite, and contribute to multiple tape-outs in progressively larger ownership scopes until you can independently close a full partition.
Can you get hired as a senior physical design engineer with limited experience?
Most senior physical design engineer roles require documented tape-out experience, so candidates without it face a real barrier at the senior level specifically. A realistic path is to apply for mid-level physical design roles first, complete one or two full tape-outs with clear ownership of a functional block, and then move laterally into a senior position once that experience is on your record.
What does the senior physical design engineer interview process look like?
The process typically begins with a recruiter screen, followed by a technical phone interview focused on physical design fundamentals like clock tree synthesis and timing constraints. A deeper technical loop with senior engineers or architects then covers hands-on problem-solving, often including a whiteboard or take-home exercise around floorplanning or timing closure. A final round with hiring managers and cross-functional leads closes the process.
Where can I find and apply to senior physical design engineer jobs?
You can find and apply to senior physical design engineer jobs on Migrate Mate, which lists current openings from across the United States. Search the listings to find roles that match your process node experience and EDA tool background, then apply directly to each opening that fits.
See All 33+ Senior Physical Design Engineer Jobs
Jump back to the full list of openings and apply to any senior physical design engineer role that fits.
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