Senior Physical Design Engineer Jobs
Senior Physical Design Engineer jobs are open across semiconductor, consumer electronics, and automotive industries, from mid-level to staff and principal engineer, with specializations in floorplanning, clock tree synthesis, and timing closure. Find a role that fits from the openings below and apply directly.
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About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X .
About the Role
As a Senior Physical Design Engineer, you will play a key role in the implementation and delivery of complex digital and mixed-signal IC designs. You will work across the physical design flow, from floorplanning through place-and-route, timing closure, physical verification, and tapeout support, helping turn architectural and RTL intent into robust silicon implementation. This role requires strong technical depth in physical design, the ability to solve complex implementation challenges, and effective collaboration with cross-functional teams across the development cycle.
Key Responsibilities
- Own physical design implementation for complex digital blocks and subsystems, including floorplanning, placement, clock tree synthesis, routing, and physical optimization
- Drive timing closure, congestion analysis, power optimization, and area improvement across assigned blocks or subsystems
- Perform physical verification activities including DRC, LVS, ERC, and reliability checks in collaboration with relevant teams
- Develop and refine physical design constraints, scripts, and flow improvements to improve quality and execution efficiency
- Collaborate closely with RTL, design verification, DFT, STA, library, and package teams to resolve design and implementation issues
- Support block-level and top-level integration activities, including interface planning, timing constraint alignment, and implementation readiness
- Analyze and debug timing, signal integrity, power, and physical implementation issues across the full backend flow
- Contribute to methodology improvements and help establish best practices for physical design execution
- Participate in design reviews and provide clear technical input on implementation trade-offs, risks, and readiness
- Author and maintain documentation for design implementation, constraints, flows, and signoff status
- Mentor junior engineers on physical design practices, tool usage, and debugging approaches
- Support tapeout planning and execution activities to ensure high-quality delivery against project milestones
Must Have Skills
- Strong experience in physical design for ASIC/SoC development, including successful implementation through tapeout
- Expertise in floorplanning, place-and-route, clock tree synthesis, timing closure, and physical verification
- Strong understanding of timing analysis, constraints, signal integrity, power optimization, and physical design trade-offs
- Experience with industry-standard physical design and signoff tools, including Cadence-based flows
- Scripting experience in TCL, Python, or similar languages for automation and flow improvement
- Experience collaborating across cross-functional teams including RTL, STA, DFT, design verification, and package or product engineering
- Strong problem-solving and debug skills across backend implementation challenges
- Clear communication and technical documentation skills
- Demonstrated ability to independently drive complex blocks or major implementation workstreams
Preferred Qualifications
- Experience with advanced-node implementation and low-power design methodologies
- Familiarity with mixed-signal integration considerations and top-level implementation challenges
- Experience improving backend flows, automation, or methodology
- Prior mentoring experience or informal technical leadership on project execution
Preferred Education and Experience
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field, or an equivalent combination of education and 5+ years of related experience
- Master’s degree in Electrical Engineering, Computer Engineering, or related field, or an equivalent combination of education and 5+ years of related experience
We recognize that candidates may not meet every listed requirement. If you bring relevant experience and a willingness to learn, we encourage you to apply.
#LI-PG1
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law .
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days The expected wage range for a new hire into this position is $116,960 to $160,820.
Actual wage offered may vary depending on work location , experience, education, training, external market data, internal pay equity, or other bona fide factors.
This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time , and other benefits.
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X .
About the Role
As a Senior Physical Design Engineer, you will play a key role in the implementation and delivery of complex digital and mixed-signal IC designs. You will work across the physical design flow, from floorplanning through place-and-route, timing closure, physical verification, and tapeout support, helping turn architectural and RTL intent into robust silicon implementation. This role requires strong technical depth in physical design, the ability to solve complex implementation challenges, and effective collaboration with cross-functional teams across the development cycle.
Key Responsibilities
- Own physical design implementation for complex digital blocks and subsystems, including floorplanning, placement, clock tree synthesis, routing, and physical optimization
- Drive timing closure, congestion analysis, power optimization, and area improvement across assigned blocks or subsystems
- Perform physical verification activities including DRC, LVS, ERC, and reliability checks in collaboration with relevant teams
- Develop and refine physical design constraints, scripts, and flow improvements to improve quality and execution efficiency
- Collaborate closely with RTL, design verification, DFT, STA, library, and package teams to resolve design and implementation issues
- Support block-level and top-level integration activities, including interface planning, timing constraint alignment, and implementation readiness
- Analyze and debug timing, signal integrity, power, and physical implementation issues across the full backend flow
- Contribute to methodology improvements and help establish best practices for physical design execution
- Participate in design reviews and provide clear technical input on implementation trade-offs, risks, and readiness
- Author and maintain documentation for design implementation, constraints, flows, and signoff status
- Mentor junior engineers on physical design practices, tool usage, and debugging approaches
- Support tapeout planning and execution activities to ensure high-quality delivery against project milestones
Must Have Skills
- Strong experience in physical design for ASIC/SoC development, including successful implementation through tapeout
- Expertise in floorplanning, place-and-route, clock tree synthesis, timing closure, and physical verification
- Strong understanding of timing analysis, constraints, signal integrity, power optimization, and physical design trade-offs
- Experience with industry-standard physical design and signoff tools, including Cadence-based flows
- Scripting experience in TCL, Python, or similar languages for automation and flow improvement
- Experience collaborating across cross-functional teams including RTL, STA, DFT, design verification, and package or product engineering
- Strong problem-solving and debug skills across backend implementation challenges
- Clear communication and technical documentation skills
- Demonstrated ability to independently drive complex blocks or major implementation workstreams
Preferred Qualifications
- Experience with advanced-node implementation and low-power design methodologies
- Familiarity with mixed-signal integration considerations and top-level implementation challenges
- Experience improving backend flows, automation, or methodology
- Prior mentoring experience or informal technical leadership on project execution
Preferred Education and Experience
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field, or an equivalent combination of education and 5+ years of related experience
- Master’s degree in Electrical Engineering, Computer Engineering, or related field, or an equivalent combination of education and 5+ years of related experience
We recognize that candidates may not meet every listed requirement. If you bring relevant experience and a willingness to learn, we encourage you to apply.
#LI-PG1
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law .
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days The expected wage range for a new hire into this position is $116,960 to $160,820.
Actual wage offered may vary depending on work location , experience, education, training, external market data, internal pay equity, or other bona fide factors.
This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time , and other benefits.
Senior Physical Design Engineer Jobs by Experience Level
See All 57 Senior Physical Design Engineer Jobs
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Find JobsSenior Physical Design Engineer Job Market
Who's Hiring
- NVIDIA10
- Amazon Web Services4
- Samsung Electronics4
- SpaceX3
Top Industries Hiring
- Electronics & Hardware10
- Consulting & Professional Services9
- Technology & Software6
- Aerospace & Defense5
- Law & Legal Services2
What Employers Look For
The qualifications that appear most often in senior physical design engineer jobs.
- 5+ years of experience in physical design at advanced process nodes
- Proficiency in Cadence Innovus or Synopsys IC Compiler for full-flow implementation
- Hands-on experience with floorplanning, placement, routing, and timing closure
- Strong understanding of static timing analysis using PrimeTime or similar tools
- Bachelor's or master's degree in electrical engineering, computer engineering, or a related field
- Experience with DRC and LVS signoff using Mentor Calibre or equivalent verification tools
Tips for Your Senior Physical Design Engineer Job Search
Quantify your physical design tape-outs
Hiring managers want to see how many tape-outs you've contributed to and at what process nodes. List the technology node, die size, and your specific ownership area, like top-level integration or partition-level timing closure, for each project on your resume.
Target openings by process node generation
Companies working at advanced nodes like 3nm or 5nm filter for very different skill sets than those at 16nm or 28nm. Read job descriptions carefully for the node family and prioritize roles where your hands-on experience is a direct match.
Apply early to roles that fit
Migrate Mate lists senior physical design engineer openings from across the United States in one place, so you can find roles that match and apply directly to each listing.
Tailor your resume to EDA tool stacks
Cadence Innovus, Synopsys IC Compiler, and Mentor Calibre all appear in job descriptions by name. Mirror the exact tool names used in each posting rather than writing generic phrases like 'industry-standard EDA tools' to pass automated screening.
Prepare a timing closure narrative for interviews
Most technical screens for this role include a deep-dive on how you've resolved setup or hold violations under tight PPA constraints. Walk in ready to describe a specific closure challenge, the root cause, and the physical implementation change that resolved it.
Negotiate using scope, not just title
At the senior level, compensation packages differ significantly based on block ownership and tape-out frequency. Before accepting an offer, clarify how many active tapes you'd own per year and whether the role includes sign-off authority, both of which affect your leverage.
Senior Physical Design Engineer Jobs: Frequently Asked Questions
Which companies are hiring the most senior physical design engineers?
The companies hiring the most senior physical design engineers right now include NVIDIA, Amazon Web Services, and Samsung Electronics, with the largest share of openings in Texas, California, and Oregon, based on current listings on Migrate Mate as of August 2026. Demand is concentrated at chip design companies and semiconductor IP providers actively preparing new tape-outs.
How many senior physical design engineer jobs are remote?
About 50% of senior physical design engineer openings are fully remote or hybrid as of August 2026, reflecting the hands-on EDA tool access most roles require. Sub-specializations in front-end physical verification review and timing analysis consulting tend to have a higher share of remote-eligible positions than full-flow implementation roles.
How do you become a senior physical design engineer?
Start with a degree in electrical or computer engineering and gain foundational experience in digital backend flows, including synthesis, placement, and routing. Build expertise at a specific process node family, earn proficiency in at least one major EDA tool suite, and contribute to multiple tape-outs in progressively larger ownership scopes until you can independently close a full partition.
Can you get hired as a senior physical design engineer with limited experience?
Most senior physical design engineer roles require documented tape-out experience, so candidates without it face a real barrier at the senior level specifically. A realistic path is to apply for mid-level physical design roles first, complete one or two full tape-outs with clear ownership of a functional block, and then move laterally into a senior position once that experience is on your record.
What does the senior physical design engineer interview process look like?
The process typically begins with a recruiter screen, followed by a technical phone interview focused on physical design fundamentals like clock tree synthesis and timing constraints. A deeper technical loop with senior engineers or architects then covers hands-on problem-solving, often including a whiteboard or take-home exercise around floorplanning or timing closure. A final round with hiring managers and cross-functional leads closes the process.
Where can I find and apply to senior physical design engineer jobs?
You can find and apply to senior physical design engineer jobs on Migrate Mate, which lists current openings from across the United States. Search the listings to find roles that match your process node experience and EDA tool background, then apply directly to each opening that fits.
See All 57 Senior Physical Design Engineer Jobs
Find roles that match your experience and apply in just a few clicks.
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