STEM OPT Ic Design Engineer Jobs
IC design engineer roles sit squarely within STEM OPT eligibility, letting you extend your F-1 work authorization by 24 months beyond your initial OPT year. Your employer must be enrolled in E-Verify, and your electrical engineering, computer engineering, or related STEM degree must align with the SOC code tied to IC design work.
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Get Access To All JobsCompany:
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > Analog Mixed Signal Design
General Summary:
Oversees definition, design, verification, and documentation for development of a variety of CMOS mixed analog/digital blocks such as: data converters, PLLs, analog/digital filters, low drop out linear voltage regulators, precision references, comparators, fingerprint sensor AFE, audio amplifiers and high speed SERDES. Determines architecture design and circuit specifications based on system level requirements. Is actively involved in all aspects of the design from system definition/simulation to circuit design and simulation. Heavy involvement in overseeing layout and silicon evaluation is also expected. Uses design tools such as Cadence ADE, MathWorks MATLAB and others. Provides technical expertise for new initiatives (e.g., 5G, analog design automation).
Minimum Qualifications:
- Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET and 4+ years of ASIC design, verification, or related work experience.
OR
- Master's degree in Electrical Engineering or related field and 4+ years of ASIC design, verification, or related work experience.
OR
- PhD in Electrical Engineering or related field and 2+ of years ASIC design, verification, or related work experience.
- 2+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).
Preferred Qualifications:
- PhD in Electrical Engineering or related field.
- 4+ years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., VCO, PLL, and DLL design, Audio CODEC and Class D Audio amplifier design, Delta-Sigma, SAR ADCs, Current-Steering DACs, high speed DDR PHYs, high-speed SERDES).
- 1+ year of work experience in a role requiring interaction with senior leadership (e.g., Director and above).
- 1+ year of experience in a technical leadership role.
Principal Duties and Responsibilities:
- Uses advanced tools or databases to build and improve on architecture and circuit designs for multiple blocks; contributes to design reviews and provides feedback to others.
- Works with layout teams to oversee block-level layout of multiple blocks.
- Defines verification plan for portion of IP or chip and runs complex simulations and analyses (e.g., power, performance) on designs; documents and utilizes results to improve and verify designs and achieve power, performance, and functionality targets.
- Designs, programs, and runs complex tests and reviews tests of junior team members; ensures bugs and other issues are identified and appropriately analyzed.
- Consults with internal or external users and third-party vendors to guide implementation and ensure alignment with their needs and goals.
- Builds deep understanding of one's domain and understands several other domains to anticipate how all components will integrate in the broader framework.
- Writes clear and detailed technical documentation and design descriptions for complex projects to guide users and/or customers.
- Demonstrates good understanding of one's business unit and conducts research on industry trends and innovations in analog or mixed-signal integrated circuit design to ensure solutions and deliverables align with best practices.
- Contributes to conversations to generate new ideas for new initiatives; provides recommendations for new directions to explore.
Level of Responsibility:
- Working independently with little supervision.
- Providing some supervision/guidance to others.
- Making decisions that are moderate in impact; errors may have relatively minor financial impact or effect on projects, operations, or customer relationships; errors may require involvement beyond immediate work group to correct.
- Using verbal and written communication skills to convey information that may be somewhat complex to others who may have limited knowledge of the subject in question; may require basic negotiation and influence, cooperation, tact, and diplomacy, etc.
- Working within prescribed budget and resources.
- Having a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to provide input on key decisions).
- Completing tasks that do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach; mistakes may result in significant rework.
- Exercising creativity to draft original documents, imagery, or work products within established guidelines.
- Using deductive and inductive problem solving; multiple approaches may be taken/necessary to solve the problem; often information is missing or incomplete; intermediate data analysis/interpretation skills may be required.
- May be solicited during strategic planning period.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range and Other Compensation & Benefits:
$142,400.00 - $213,600.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
Company:
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > Analog Mixed Signal Design
General Summary:
Oversees definition, design, verification, and documentation for development of a variety of CMOS mixed analog/digital blocks such as: data converters, PLLs, analog/digital filters, low drop out linear voltage regulators, precision references, comparators, fingerprint sensor AFE, audio amplifiers and high speed SERDES. Determines architecture design and circuit specifications based on system level requirements. Is actively involved in all aspects of the design from system definition/simulation to circuit design and simulation. Heavy involvement in overseeing layout and silicon evaluation is also expected. Uses design tools such as Cadence ADE, MathWorks MATLAB and others. Provides technical expertise for new initiatives (e.g., 5G, analog design automation).
Minimum Qualifications:
- Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET and 4+ years of ASIC design, verification, or related work experience.
OR
- Master's degree in Electrical Engineering or related field and 4+ years of ASIC design, verification, or related work experience.
OR
- PhD in Electrical Engineering or related field and 2+ of years ASIC design, verification, or related work experience.
- 2+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).
Preferred Qualifications:
- PhD in Electrical Engineering or related field.
- 4+ years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., VCO, PLL, and DLL design, Audio CODEC and Class D Audio amplifier design, Delta-Sigma, SAR ADCs, Current-Steering DACs, high speed DDR PHYs, high-speed SERDES).
- 1+ year of work experience in a role requiring interaction with senior leadership (e.g., Director and above).
- 1+ year of experience in a technical leadership role.
Principal Duties and Responsibilities:
- Uses advanced tools or databases to build and improve on architecture and circuit designs for multiple blocks; contributes to design reviews and provides feedback to others.
- Works with layout teams to oversee block-level layout of multiple blocks.
- Defines verification plan for portion of IP or chip and runs complex simulations and analyses (e.g., power, performance) on designs; documents and utilizes results to improve and verify designs and achieve power, performance, and functionality targets.
- Designs, programs, and runs complex tests and reviews tests of junior team members; ensures bugs and other issues are identified and appropriately analyzed.
- Consults with internal or external users and third-party vendors to guide implementation and ensure alignment with their needs and goals.
- Builds deep understanding of one's domain and understands several other domains to anticipate how all components will integrate in the broader framework.
- Writes clear and detailed technical documentation and design descriptions for complex projects to guide users and/or customers.
- Demonstrates good understanding of one's business unit and conducts research on industry trends and innovations in analog or mixed-signal integrated circuit design to ensure solutions and deliverables align with best practices.
- Contributes to conversations to generate new ideas for new initiatives; provides recommendations for new directions to explore.
Level of Responsibility:
- Working independently with little supervision.
- Providing some supervision/guidance to others.
- Making decisions that are moderate in impact; errors may have relatively minor financial impact or effect on projects, operations, or customer relationships; errors may require involvement beyond immediate work group to correct.
- Using verbal and written communication skills to convey information that may be somewhat complex to others who may have limited knowledge of the subject in question; may require basic negotiation and influence, cooperation, tact, and diplomacy, etc.
- Working within prescribed budget and resources.
- Having a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to provide input on key decisions).
- Completing tasks that do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach; mistakes may result in significant rework.
- Exercising creativity to draft original documents, imagery, or work products within established guidelines.
- Using deductive and inductive problem solving; multiple approaches may be taken/necessary to solve the problem; often information is missing or incomplete; intermediate data analysis/interpretation skills may be required.
- May be solicited during strategic planning period.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range and Other Compensation & Benefits:
$142,400.00 - $213,600.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
See all STEM OPT Ic Design Engineer Jobs
Sign up for free to unlock all listings, filter by visa type, and get alerts for new STEM OPT Ic Design Engineer Jobs.
Get Access To All JobsTips for Finding STEM OPT Authorization as an Ic Design Engineer
Verify your CIP code covers IC design
Cross-reference your degree's CIP code against the STEM-designated degree list that USCIS and ICE publish. Electrical engineering (14.1001) and computer engineering (14.0901) both qualify, but computer science degrees may need closer review depending on your university's listed CIP code.
Confirm E-Verify enrollment before applying
Ask your recruiter directly whether the hiring entity, not just the parent company, is enrolled in E-Verify. Subsidiaries and acquired startups often operate under separate EINs, and E-Verify enrollment doesn't automatically transfer, so verify the specific legal entity that will employ you.
Build a training plan around your IC design workflow
Your I-983 training plan must connect your STEM degree learning objectives to your actual job tasks. For IC design, map coursework in circuit theory, VLSI, or semiconductor physics directly to the design tools, tapeout processes, and verification methodologies your employer will assign you.
Target fabless companies and EDA tool vendors
Fabless semiconductor firms and EDA software companies consistently hire on STEM OPT and have structured onboarding for the I-983 reporting cycle. Their HR teams are familiar with the 6-month and 12-month evaluation checkpoints USCIS requires under the STEM extension.
Search for IC design roles on Migrate Mate
Migrate Mate filters IC design engineer listings by E-Verify-enrolled employers, so you're not manually vetting each company's enrollment status. Use it to surface roles where the employer infrastructure already supports STEM OPT onboarding.
Time your H-1B registration around your OPT end date
If your STEM OPT expires before October 1 of the fiscal year you're selected in the H-1B lottery, the cap-gap rule extends your authorization automatically. File your H-1B visa petition with your employer before your STEM OPT end date to preserve that bridge and avoid a status gap.
Frequently Asked Questions
Does an IC design engineer role qualify for the STEM OPT extension?
Yes, IC design engineer positions qualify when your degree is in an eligible STEM field such as electrical engineering, computer engineering, or a related discipline with a qualifying CIP code. The role must be directly related to your degree, and your employer must confirm the connection in your I-983 training plan. USCIS reviews the degree-to-job alignment when you file for the 24-month extension.
How do I find IC design engineer employers enrolled in E-Verify?
You can browse IC design engineer listings on Migrate Mate, which filters for E-Verify-enrolled employers so you don't have to research each company manually. When you receive an offer, confirm that the specific legal entity signing your employment agreement, not just the corporate parent, is the enrolled entity in E-Verify, since subsidiaries can operate under separate employer identification numbers.
What goes into the I-983 training plan for an IC design engineer role?
Your I-983 must document how the IC design work you'll perform connects to the STEM learning objectives from your degree. List specific tasks like RTL design, simulation, physical layout, or verification, and tie each to coursework in areas such as VLSI design, digital logic, or semiconductor devices. Both you and your employer's designated supervisor sign the plan, and you'll submit updated evaluations at six and twelve months.
Does my computer science degree qualify me for STEM OPT in an IC design engineer role?
It depends on your university's assigned CIP code for your specific computer science program and whether the IC design role is considered directly related to that degree. Some computer science programs carry CIP codes on the STEM-designated list while others do not. Cross-check your degree's CIP code against the official STEM list and review the job description to assess whether your coursework in hardware, computer architecture, or logic design supports the connection.
What happens to my STEM OPT if my IC design employer loses E-Verify enrollment?
If your employer loses E-Verify enrollment or withdraws, your STEM OPT authorization is no longer valid with that employer, and you must stop working. You have a 60-day grace period from the end of your authorized employment to find a new E-Verify-enrolled employer or take other action to maintain lawful status. Notify your DSO immediately and consult USCIS guidance on the steps required to transfer your STEM OPT to a qualifying new employer.