Mid Level ASIC Design Engineer Jobs
Mid level asic design engineer jobs go to engineers ready to own blocks or subsystems end to end, make microarchitecture decisions with limited oversight, and mentor junior colleagues on design and verification flows. Openings are distributed across on-site, hybrid, and remote settings in Technology & Software, Electronics & Hardware, and Artificial Intelligence, with employers like Apple, Google, and Arcfield actively hiring at this level now.
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INTRODUCTION
NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading GPUs and SoCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company spanning product lines from consumer graphics to datacenter platforms, self-driving cars, and the growing field of artificial intelligence. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. As a member of the NVLink ASIC Design team, you will work with a worldwide team of architects and engineers dedicated to building high-speed chip-to-chip communication and high-performance, low-power GPU and interconnect subsystems. You will work closely with architects, design engineers, verification engineers, and physical design engineers to contribute to the design and development of next-generation NVLink protocol and GPU subsystem logic, delivering functional, performant, and physically implementable designs.
ROLE AND RESPONSIBILITIES
- Engage in and support the design and development of NVIDIA’s next-generation NVLink protocol and GPU subsystem logic.
- Contribute to micro-architecture development and document specifications of GPU and interconnect sub-systems.
- Implement in RTL and debug while collaborating with the verification team to ensure that the design is functional and performant.
- Apply logic design skills to optimize and meet performance and power goals.
- Deliver a synthesis/timing clean design while collaborating with the physical design team to ensure a routable and physically implementable solution.
- Support hardware engineering activities including chip floor plan, power/clock distribution, chip assembly, timing closure, power and noise analysis, and back-end verification.
- Develop flows and tools as necessary in support of design activities.
BASIC QUALIFICATIONS
- A Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience and 5+ years of industry experience.
- Solid practical understanding of Verilog and/or SystemVerilog.
- Relevant project experience in micro-architecture and RTL development of complex designs.
- Exposure to computer architecture and digital systems designs.
- Highly proficient in logic development, Verilog and/or SystemVerilog, with an understanding of physical implementation and VLSI.
- Strength in scripting languages such as Perl or Python.
- Strong collaboration and communication skills.
PREFERRED QUALIFICATIONS
- Background with low-power build methodologies.
- Experience with high-speed build methodologies.
- Proven track record of successfully implementing complex designs.
With competitive salaries and a generous benefits package, NVIDIA is widely considered one of the technology world’s most desirable employers. We employ some of the most forward-thinking and hardworking people in the world. If you are creative, autonomous, and passionate about crafting high-performance, low-power silicon, we want to hear from you!
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until July 6, 2026. This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
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Mid Level ASIC Design Engineer Jobs: Frequently Asked Questions
How do I get a mid level asic design engineer job?
Lead with ownership: highlight chips or blocks you took from RTL through tapeout with minimal guidance, and call out any cross-functional decisions you drove independently. Tailor your resume to the specific process node and toolchain listed in the job description, whether that is front-end synthesis, physical design, or DFT. Concrete metrics, such as area reduction or timing closure improvements, carry more weight than job titles alone.
Which companies hire mid level asic design engineers?
Companies hiring mid level asic design engineers right now include Apple, Google, and Arcfield, based on current listings on Migrate Mate as of August 2026. Hiring at this level comes from a mix of established semiconductor companies, hyperscaler silicon teams building custom compute hardware, and defense contractors developing application-specific processors for specialized systems.
Are there remote mid level asic design engineer jobs?
Yes, though fully remote roles are less common in hardware than in software disciplines due to lab and toolchain access requirements. About 22% of mid level asic design engineer openings are remote or hybrid as of August 2026, with hybrid arrangements being the most prevalent, typically requiring on-site presence for bringup, lab work, or design reviews.
How do I move up to a mid level asic design engineer role?
The path from entry level to mid level centers on building depth in a specific design domain, such as RTL design, physical implementation, or verification, while progressively taking on more complex blocks with less supervision. Engineers who advance fastest seek out tapeout experience early, document measurable contributions to each project, and volunteer to mentor interns or new hires, demonstrating the judgment that mid level roles require.
Which industries hire the most mid level asic design engineers?
Mid Level asic design engineer roles concentrate in Technology & Software, Electronics & Hardware, and Artificial Intelligence, based on current listings on Migrate Mate as of August 2026. Those sectors drive demand because they require custom silicon to meet performance, power, or latency targets that off-the-shelf chips cannot achieve, making experienced asic designers a sustained hiring priority.