Design Engineer Jobs at Intel with Visa Sponsorship
Intel's Design Engineer roles span silicon architecture, physical design, RTL development, and verification across products like CPUs, GPUs, and network silicon. Intel has a well-established sponsorship track record for engineering roles and works with international candidates across multiple visa categories, including both employment-based and training-based pathways.
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Job Description:
Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.
Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.
Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.
Optimizes CPU design to improve product level parameters such as power, frequency, and area.
Participates in the development and improvement of physical design methodologies and flow automation.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
The candidate must possess a bachelor's degree in computer engineering, Computer Science or Electrical/Electronic Engineering or any STEM related degree and 6+ years of experience OR master's degree in computer engineering, Computer Science or Electrical/Electronic Engineering or any STEM related degree and 4+ years of experience in:
VLSI circuit design and synthesis.
Static timing analysis.
* Low power design.
Preferred Qualifications
2+ years of experience in:
x86 CPU architecture.
Tcl/Perl/Python programming.
Job Type
Experienced Hire
Shift
Shift 1 (United States of America)
Primary Location: US, California, Folsom
Additional Locations:
Business Group
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00 - 232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
- Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION:
Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Job Details
Job Description:
Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.
Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.
Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.
Optimizes CPU design to improve product level parameters such as power, frequency, and area.
Participates in the development and improvement of physical design methodologies and flow automation.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
The candidate must possess a bachelor's degree in computer engineering, Computer Science or Electrical/Electronic Engineering or any STEM related degree and 6+ years of experience OR master's degree in computer engineering, Computer Science or Electrical/Electronic Engineering or any STEM related degree and 4+ years of experience in:
VLSI circuit design and synthesis.
Static timing analysis.
* Low power design.
Preferred Qualifications
2+ years of experience in:
x86 CPU architecture.
Tcl/Perl/Python programming.
Job Type
Experienced Hire
Shift
Shift 1 (United States of America)
Primary Location: US, California, Folsom
Additional Locations:
Business Group
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00 - 232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
- Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION:
Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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Get Access To All JobsTips for Finding Design Engineer Jobs at Intel Jobs
Align your portfolio to Intel's silicon stack
Intel recruits Design Engineers for specific nodes and toolchains. Tailor your resume to show hands-on experience with RTL design, physical implementation, or DFT in contexts that map to CPU, GPU, or networking silicon, not generic FPGA or academic projects.
Clarify the LCA wage level during offer negotiation
Intel files a Labor Condition Application with DOL for every sponsored hire. The prevailing wage level on your LCA must match your offered salary. Asking your recruiter which wage level the role is benchmarked at helps you catch mismatches before your I-129 is filed.
Build depth in Intel's interview loop early
Intel's Design Engineer hiring involves multiple technical screens covering microarchitecture, timing closure, or verification methodology depending on the team. Candidates who clear early rounds but lack depth in the specific design domain often stall at the hiring manager stage.
Confirm cap-exempt status if switching from academia
If you're transitioning from a university research role, Intel can file your H-1B outside the annual lottery if your previous employer was cap-exempt. Verify with USCIS guidelines whether a concurrent arrangement preserves that status during the transition period.
Prepare degree equivalency documentation before your offer letter
Intel's Design Engineer roles require a bachelor's or higher in electrical engineering or computer engineering. If your degree is from outside the U.S., a credential evaluation from a NACES-approved agency should be ready before USCIS adjudicates your specialty occupation petition.
Design Engineer at Intel jobs are hiring across the US. Find yours.
Find Design Engineer at Intel JobsFrequently Asked Questions
Does Intel sponsor H-1B visas for Design Engineers?
Yes, Intel sponsors H-1B visas for Design Engineer roles. Intel has a well-established internal immigration team that manages the full petition process, including the Labor Condition Application with DOL and the I-129 filing with USCIS. Because Intel participates in the H-1B lottery, timing your application to the annual registration window in March matters if you don't already hold H-1B status.
How do I apply for Design Engineer jobs at Intel?
Applications go through Intel's careers portal at intel.com/jobs. Search for Design Engineer roles filtered by product group or location. For roles that require sponsorship, the job posting typically indicates eligibility. Migrate Mate lists Intel's open Design Engineer positions and filters by visa sponsorship type, which saves time if you need to confirm a role supports your specific visa category before applying.
Which visa types does Intel commonly sponsor for Design Engineer roles?
Intel sponsors Design Engineers on H-1B, E-3 (for Australian citizens), TN (for Canadian and Mexican nationals), F-1 OPT and CPT for students, J-1 for interns and trainees, and employment-based Green Card pathways including EB-2 and EB-3. The applicable category depends on your nationality, education level, and career stage. Full-time hires most commonly proceed on H-1B or E-3, with Green Card sponsorship typically initiated after a period of employment.
What qualifications does Intel expect for sponsored Design Engineer roles?
Intel's Design Engineer positions generally require a bachelor's degree or higher in electrical engineering, computer engineering, or a directly related field. For USCIS specialty occupation purposes, the degree must align with the specific role, so a computer science degree supporting a physical design role may require additional documentation. Hands-on experience with industry-standard EDA tools, HDL languages, or specific design flows strengthens both your candidacy and your petition.
How do I time a visa sponsorship filing with Intel's hiring process?
If you need H-1B sponsorship and don't currently hold that status, Intel would need to register you in the USCIS lottery held each March for an October 1 start date. If you're on OPT, Intel can hire you immediately and file for H-1B in the next cycle. E-3 and TN sponsors don't face a lottery and can be filed year-round, giving those candidates more scheduling flexibility.
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