Design Engineer Jobs in Arizona
Design Engineer jobs in Arizona are in strong demand, with active hiring concentrated in aerospace and defense, semiconductor manufacturing, and industrial systems, and openings at every level from entry-level to principal engineer. Phoenix, Tucson, and Chandler anchor most of the activity, where established employers like Raytheon Technologies, Intel, and Honeywell maintain major engineering operations. The most sought-after specialties in Arizona are mechanical design, electrical and PCB layout, and systems integration. Find a role that fits below and apply directly.
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Showing 5 of 108+ Design Engineer jobs
DESCRIPTION
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs.
In this role, you will execute package layout tasks from floor planning through tape out and manufacturing release, working closely with senior engineers, SI/PI, thermal, and manufacturing teams to deliver production-ready designs that meet performance, density, and reliability targets.
Key job responsibilities
- Execute package layout tasks across the design cycle: die floor planning, bump/pad assignment, RDL routing, substrate design, verification, and tape out release.
- Implement physical designs for advanced packaging architectures including 2.5D interposer, 3D-IC, fan-out wafer-level packaging, and silicon bridge technologies (e.g., CoWoS, EMIB, or similar).
- Support package floorplan development considering die placement, bump maps, power/ground distribution, signal escape routing, and decoupling capacitor placement.
- Perform RDL and substrate routing for high-density interconnects including microbumps, C4 bumps, TSVs, microvias, and PTH vias across multi-layer organic substrates or silicon interposers.
- Support die-level RDL routing and bump planning in coordination with ASIC physical design teams to help co-optimize the die-package interface.
- Contribute to cross-level layout co-optimization across die RDL, interposer/substrate, and PCB levels under guidance from senior engineers.
- Assist in maintaining package stack-up definitions in collaboration with SI/PI and materials engineering teams.
- Run physical verification checks (DRC, connectivity, shorts/opens) and support design closure.
- Follow and help refine package design rules and guidelines, working with OSAT partners and foundries to ensure DFM compliance.
- Collaborate with SI/PI engineers to incorporate electrical constraints into the physical layout — impedance-controlled routing, power plane optimization, and critical net shielding.
BASIC QUALIFICATIONS
- Bachelor's degree in Electrical Engineering or a related field
- Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills
- Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing
- 5+ years of experience in IC package layout and physical design
- Experience executing package designs from concept through tape out for multi-layer organic substrates or silicon interposers
- Hands-on experience with package layout tools such as Cadence APD/SiP, Synopsys IC Packaging, Mentor Xpedition, or equivalent
- Understanding of advanced packaging technologies: 2.5D/3D-IC, fan-out WLP, RDL, TSV, microbump, or silicon bridge interconnects
- Working knowledge of package design rules, DFM constraints, and physical verification methodologies (DRC, connectivity checks)
- Experience with bump map and ball map definition, escape routing strategies, and power/ground plane design
- Good communication skills with the ability to work effectively across design, SI/PI, and manufacturing teams
PREFERRED QUALIFICATIONS
- Master's degree in Electrical or Communications Engineering or a related field
- Experience with formal verification techniques including abstraction and end-to-end checking
- Experience with ARM and various DSP ISAs
- Experience with current and upcoming RF standards in cellular (4G/5G NR), WiMAX, 802.11ad, microwave backhaul, or related broadband wireless standards
- Experience with industry standard tools and scripting languages (Python or Perl) for automation
- MS with 3+ years in IC package layout and physical design
- Familiarity with substrate and interposer manufacturing processes, material properties, and their impact on design decisions
- Exposure to chiplet-based or heterogeneous integration packaging architectures
- Familiarity with package-level SI/PI concepts (impedance control, PDN layout, crosstalk-aware routing) sufficient to collaborate with SI/PI engineers
- Experience developing automation scripts (Python, TCL, Skill, Ravel) for layout tasks or design rule checks
- Exposure to working with OSAT partners on NPI builds or yield improvement efforts
- Familiarity with high-bandwidth memory (HBM) integration in advanced packaging contexts
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
USA, AZ, Tempe - 136,000.00 - 184,000.00 USD annually
USA, CA, Cupertino - 157,300.00 - 212,800.00 USD annually
USA, TX, Austin - 136,000.00 - 184,000.00 USD annually
DESCRIPTION
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs.
In this role, you will execute package layout tasks from floor planning through tape out and manufacturing release, working closely with senior engineers, SI/PI, thermal, and manufacturing teams to deliver production-ready designs that meet performance, density, and reliability targets.
Key job responsibilities
- Execute package layout tasks across the design cycle: die floor planning, bump/pad assignment, RDL routing, substrate design, verification, and tape out release.
- Implement physical designs for advanced packaging architectures including 2.5D interposer, 3D-IC, fan-out wafer-level packaging, and silicon bridge technologies (e.g., CoWoS, EMIB, or similar).
- Support package floorplan development considering die placement, bump maps, power/ground distribution, signal escape routing, and decoupling capacitor placement.
- Perform RDL and substrate routing for high-density interconnects including microbumps, C4 bumps, TSVs, microvias, and PTH vias across multi-layer organic substrates or silicon interposers.
- Support die-level RDL routing and bump planning in coordination with ASIC physical design teams to help co-optimize the die-package interface.
- Contribute to cross-level layout co-optimization across die RDL, interposer/substrate, and PCB levels under guidance from senior engineers.
- Assist in maintaining package stack-up definitions in collaboration with SI/PI and materials engineering teams.
- Run physical verification checks (DRC, connectivity, shorts/opens) and support design closure.
- Follow and help refine package design rules and guidelines, working with OSAT partners and foundries to ensure DFM compliance.
- Collaborate with SI/PI engineers to incorporate electrical constraints into the physical layout — impedance-controlled routing, power plane optimization, and critical net shielding.
BASIC QUALIFICATIONS
- Bachelor's degree in Electrical Engineering or a related field
- Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills
- Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing
- 5+ years of experience in IC package layout and physical design
- Experience executing package designs from concept through tape out for multi-layer organic substrates or silicon interposers
- Hands-on experience with package layout tools such as Cadence APD/SiP, Synopsys IC Packaging, Mentor Xpedition, or equivalent
- Understanding of advanced packaging technologies: 2.5D/3D-IC, fan-out WLP, RDL, TSV, microbump, or silicon bridge interconnects
- Working knowledge of package design rules, DFM constraints, and physical verification methodologies (DRC, connectivity checks)
- Experience with bump map and ball map definition, escape routing strategies, and power/ground plane design
- Good communication skills with the ability to work effectively across design, SI/PI, and manufacturing teams
PREFERRED QUALIFICATIONS
- Master's degree in Electrical or Communications Engineering or a related field
- Experience with formal verification techniques including abstraction and end-to-end checking
- Experience with ARM and various DSP ISAs
- Experience with current and upcoming RF standards in cellular (4G/5G NR), WiMAX, 802.11ad, microwave backhaul, or related broadband wireless standards
- Experience with industry standard tools and scripting languages (Python or Perl) for automation
- MS with 3+ years in IC package layout and physical design
- Familiarity with substrate and interposer manufacturing processes, material properties, and their impact on design decisions
- Exposure to chiplet-based or heterogeneous integration packaging architectures
- Familiarity with package-level SI/PI concepts (impedance control, PDN layout, crosstalk-aware routing) sufficient to collaborate with SI/PI engineers
- Experience developing automation scripts (Python, TCL, Skill, Ravel) for layout tasks or design rule checks
- Exposure to working with OSAT partners on NPI builds or yield improvement efforts
- Familiarity with high-bandwidth memory (HBM) integration in advanced packaging contexts
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
USA, AZ, Tempe - 136,000.00 - 184,000.00 USD annually
USA, CA, Cupertino - 157,300.00 - 212,800.00 USD annually
USA, TX, Austin - 136,000.00 - 184,000.00 USD annually
See All 108+ Design Engineer Jobs in Arizona
Find roles in Arizona that match your experience and apply in just a few clicks.
Find Design Engineer JobsDesign Engineer Jobs by City in Arizona
Where Arizona roles are concentrated, by current openings.
Design Engineer Job Market in Arizona
A snapshot from current Arizona openings, updated as new roles post.
Who's Hiring
- Honeywell Aerospace11
- Raytheon9
- Renesas8
- Analog Devices6
- Intel4
Top Industries Hiring
- Electronics & Hardware12
- Consulting & Professional Services6
- Construction & Real Estate3
- Telecommunications2
What Arizona Employers Look For
The qualifications that appear most often in design engineer jobs across Arizona.
- Bachelor's degree in mechanical, electrical, or industrial engineering from an ABET-accredited program
- Proficiency in CAD software such as SolidWorks, AutoCAD, or Creo for design and documentation
- Experience with GD&T, engineering drawings, and product lifecycle management tools
- Familiarity with aerospace, defense, or semiconductor manufacturing processes and standards
- Ability to obtain or hold a U.S. security clearance for defense-sector roles in Arizona
- Strong cross-functional collaboration skills working with manufacturing, quality, and test teams
Design Engineer Jobs in Arizona: Frequently Asked Questions
How do you become a design engineer in Arizona?
Most design engineer roles in Arizona require a bachelor's degree in engineering from an ABET-accredited program. For roles in the public sector or those requiring professional sign-off on designs, you may pursue licensure as a Professional Engineer through the Arizona State Board of Technical Registration. Many Arizona employers in aerospace and defense also expect candidates to qualify for a security clearance, which requires U.S. citizenship and a clean background.
Which companies hire design engineers in Arizona?
Employers hiring design engineers in Arizona right now include Honeywell Aerospace, Raytheon, and Renesas, based on current listings on Migrate Mate as of August 2026. Arizona's aerospace, semiconductor, and defense manufacturing base means large, established engineering organizations are among the most consistent sources of design engineer openings across the state.
Which Arizona cities have the most design engineer jobs?
Phoenix, Tucson, and Chandler have the most design engineer openings in Arizona. Phoenix and its East Valley suburbs like Chandler and Tempe drive the largest share of activity, anchored by Intel's semiconductor campus and major aerospace and defense contractors, while Tucson's hiring reflects Raytheon Technologies and its surrounding defense industry ecosystem.
Are there remote design engineer jobs in Arizona?
Yes, but they're rare. Design engineering typically requires hands-on access to CAD systems, hardware prototypes, and manufacturing floors, which limits full remote work. About 57% of design engineer openings tied to Arizona are remote or hybrid as of August 2026, and where flexibility exists it tends to apply to the documentation, analysis, and design review portions of the role rather than prototype or lab work.
How can I get hired as a design engineer in Arizona with little or no experience?
The most realistic entry path is a new-graduate or co-op role at one of Arizona's large aerospace or semiconductor employers, where Raytheon Technologies, Honeywell, and Intel all run structured early-career engineering programs. Targeting adjacent titles like junior mechanical designer, CAD technician, or manufacturing engineer gives a foot in the door. A strong portfolio of CAD projects and progress toward a Professional Engineer licensure application through the Arizona State Board of Technical Registration also distinguishes candidates without industry experience.
Where can I find and apply to design engineer jobs in Arizona?
You can find and apply to design engineer jobs in Arizona on Migrate Mate, which lists current Arizona openings across industries and experience levels. Find the roles that fit your background and apply directly.
See All 108+ Design Engineer Jobs in Arizona
Find roles in Arizona that match your experience and apply in just a few clicks.
Find Design Engineer Jobs